Engineering Parallel Applications with Tunable Architectures

  • Tagung:

    Vortrag 

  • Autoren:

    Walter F. Tichy 

  • Summary

    Current multicore computers differ significantly in hardware characteristics. Software developers therefore hand-tune parallel programsfor a given platform to achieve best performance. This is tedious and leads to non-portable code.Although the architecture of parallel applications also requires adaptationto achieve best performance, it is rarely modified becauseof the additional effort. The Tunable Architectures approach proposed in this talk automates thearchitecture adaptation of parallel programs and uses anauto-tuner to find the best-performing architectural choicefor a given machine. We introduce a new architecturedescription language based on parallel patterns and a framework for expressing architecture variants in a generic way. Several case studies demonstrate significant performance improvements due to automatic architecture tuning and show the applicability of our approach to industrial applications.

    See also: http://www.parallel.illinois.edu/dls_archive.html
  • Jahr:

    2010 

  • Links:
Beteiligte Mitarbeiter (zufällige Reihenfolge)
Titel Vorname Nachname
Prof. em. Dr. Walter F. Tichy

Bibtex

@vortrag{,
author={Walter F. Tichy},
title={Engineering Parallel Applications with Tunable Architectures},
year=2010,
month=Feb,
abstract={Current multicore computers differ significantly in hardware characteristics. Software developers therefore hand-tune parallel programsfor a given platform to achieve best performance. This is tedious and leads to non-portable code.Although the architecture of parallel applications also requires adaptationto achieve best performance, it is rarely modified becauseof the additional effort. The Tunable Architectures approach proposed in this talk automates thearchitecture adaptation of parallel programs and uses anauto-tuner to find the best-performing architectural choicefor a given machine. We introduce a new architecturedescription language based on parallel patterns and a framework for expressing architecture variants in a generic way. Several case studies demonstrate significant performance improvements due to automatic architecture tuning and show the applicability of our approach to industrial applications.},
organization={Universal Parallel Computing Research Center at the University of Illinois in Urbana-Champaign},
pptUrl={https://ps.ipd.kit.edu/downloads/vor_2010_engineering_parallel_applications_tunable.pdf},
note={
See also: http://www.parallel.illinois.edu/dls_archive.html

 

},
}